Interface-based bit error detection can trigger bit error alarm generation and clearing, and the association of bit error alarms with static TE-LSP/PW/E-PW APS.
PW-layer bit error detection utilizes TE-LSP-layer TP OAM. When configuring PW-layer bit error detection, configure TE-LSP-layer TP OAM.
Bit errors on an interface trigger APS. If high ambient temperature caused these bit errors, you must disable and then re-enable the interface. This will switch services back to the original path when ambient temperature returns to normal.
The system view is displayed.
The interface view is displayed.